The 74HC137 decoder utilizes advanced silicon-gate CMOS technology and is well suited to memory address decoding or data routing applications. The circuit features high noise immunity and low power consumption usually associated with CMOS circuitry, yet has speeds comparable to low power Schottky TTL logic. The 74HC137 has 3 binary select inputs (A, B, and C). If the device is enabled, these inputs determine which one of the eight normally HIGH outputs will go LOW. Two active LOW and one active HIGH enables (G1, G2A and G2B) are provided to ease the cascading of decoders. The decoder’s outputs can drive 10 low power Schottky TTL equivalent loads, and are functionally and pin equivalent to the 74LS137. All inputs are protected from damage due to static discharge by diodes to VCC and ground.

Features:-

• Combines 3-to-8 decoder with 3-bit latch
• Multiple input enable for easy expansion or independent controls
• Active LOW mutually exclusive outputs
• Low-power dissipation
• Complies with JEDEC standard no. 7A
• Multiple package options

Specifications:-

Package Includes :-

1 x 74HC137 3-to-8 line Decoder/Demultiplexer IC (74138 IC) DIP-16 Package